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1 lt1189 low power video difference amplifier closed-loop gain vs frequency cable sense amplifier for loop through connections with dc adjust frequency (mhz) 0 voltage gain (db) 10 20 30 40 0.1 10 100 lt1189 ?ta02 1 v s = ?v r l = 1k 50 lt1189 ?ta01 cable v dc 5v 7 6 lt1189 ?v 4 + + 3 1 2 8 909 w v out v in 100 w d u escriptio s f ea t u re the lt1189 is a difference amplifier optimized for opera- tion on 5v, or a single 5v supply, and gain 3 10. this versatile amplifier features uncommitted high input im- pedance (+) and (C) inputs, and can be used in differential or single-ended configurations. additionally, a second set of inputs give gain adjustment and dc control to the difference amplifier. the lt1189s high slew rate, 220v/ m s, wide bandwidth, 35mhz, and 20ma output current require only 13ma of supply current. the shutdown feature reduces the power dissipation to a mere 15mw, and allows multiple amplifi- ers to drive the same cable. the lt1189 is a low power, gain of 10 stable version of the popular lt1193, and is available in 8-pin minidips and so packages. for lower gain applications see the lt1187 data sheet. n differential or single-ended gain block (adjustable) n C3db bandwidth, a v = 10 35mhz n slew rate 220v/ m s n low supply current 13ma n output current 20ma n cmrr at 10mhz 48db n lt1193 pin out n low cost n single 5v operation n drives cables directly n output shutdown u s a o pp l ic at i n line receivers n video signal processing n cable drivers n tape and disc drive systems u a o pp l ic at i ty p i ca l
lt1189 2 a u g w a w u w a r b s o lu t exi t i s wu u package / o rder i for atio order part number total supply voltage (v + to v C ) ............................. 18v differential input voltage ........................................ 6v input voltage .......................................................... v s output short circuit duration (note 1) ........ continuous operating temperature range lt1189m ..................................... C 55 c to 150 c lt1189c............................................. 0 c to 70 c junction temperature (note 2) plastic package (cn8,cs8) ......................... 150 c ceramic package (cj8,mj8) ....................... 175 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec.)................ 300 c s8 part marking lt1189mj8 lt1189cj8 lt1189cn8 lt1189cs8 lt1189m/c symbol parameter conditions min typ max units v os input offset voltage either input, (note 4) 1.0 3.0 mv soic package 1.0 4.0 mv i os input offset current either input 0.2 1.0 m a i b input bias current either input 0.5 2.0 m a e n input noise voltage f o = 10khz 30 nv/ ? hz i n input noise current f o = 10khz 1.25 pa/ ? hz r in input resistance differential 30 k w c in input capacitance either input 2.0 pf v in lim input voltage limit (note 5) 170 mv input voltage range C2.5 3.5 v cmrr common-mode rejection ratio v cm = C2.5v to 3.5v 80 105 db psrr power supply rejection ratio v s = 2.375v to 8v 75 90 db v out output voltage swing v s = 5v, r l = 1k, a v = 50 3.8 4.0 v v s = 8v, r l = 1k, a v = 50 6.7 7.0 v s = 8v, r l = 300 w , a v = 50, (note 3) 6.4 6.8 g e gain error v o = 1.0v, a v = 10 1.0 3.5 % sr slew rate (note 6, 10) 150 220 v/ m s fpbw full power bandwidth v o = 2v p-p , (note 7) 35 mhz bw small signal bandwidth a v = 10 35 mhz t r , t f rise time, fall time a v = 50, v o = 1.5v, 20% to 80% (note 10) 35 50 75 ns t pd propagation delay r l = 1k, v o = 125mv, 50% to 50% 12 ns overshoot v o = 50mv 10 % t s settling time 3v step, 0.1%, (note 8) 1 m s diff a v differential gain r l = 1k, a v = 10, (note 9) 0.6 % diff ph differential phase r l = 1k, a v = 10, (note 9) 0.75 deg p-p i s supply current 13 16 ma shutdown supply current pin 5 at v C 0.8 1.5 ma v s = 5v, v ref = 0v, r fb1 = 900 w from pins 6 to 8, r fb2 = 100 w from pin 8 to ground, r l = r fb1 + r fb2 = 1k, c l 10pf, pin 5 open. e lectr ic al c c hara terist ics t a = 25 c, (note 3) 5v C + 8 7 6 5 4 3 2 1 +/ref ?n +in v s/d out + v ?fb top view s8 package 8-lead plastic soic n8 package 8-lead plastic dip j8 package 8-lead hermetic dip lt1189 ?poi01 1189 t jmax = 175 c, q ja = 100 c/w (j8) t jmax = 150 c, q ja = 100 c/w (n8) t jmax = 150 c, q ja = 150 c/w (s8)
3 lt1189 v s = 5v, v ref = 0v, r fb1 = 900 w from pins 6 to 8, r fb2 = 100 w from pin 8 to ground, r l = r fb1 + r fb2 = 1k, c l 10pf, pin 5 open. lt1189m symbol parameter conditions min typ max units v os input offset voltage either input, (note 4) 1.0 7.5 mv d v os / d t input v os drift 10 m v/ c i os input offset current either input 0.2 1.5 m a i b input bias current either input 0.5 3.5 m a input voltage range C2.5 3.5 v cmrr common-mode rejection ratio v cm = C2.5v to 3.5v 80 105 db psrr power supply rejection ratio v s = 2.375v to 8v 65 90 db v out output voltage swing v s = 5v, r l = 1k, a v = 50 3.7 4.0 v v s = 8v, r l = 1k, a v = 50 6.6 7.0 v s = 8v, r l = 300 w , a v = 50, (note 3) 6.4 6.6 g e gain error v o = 1v, a v = 10, r l = 1k 1.0 6.0 % i s supply current 13 17 ma shutdown supply current pin 5 at v C , (note 11) 0.8 1.5 ma i s/d shutdown pin current pin 5 at v C 525 m a v s = 5v, v ref = 0v, r fb1 = 900 w from pins 6 to 8, r fb2 = 100 w from pin 8 to ground, r l = r fb1 + r fb2 = 1k, c l 10pf, pin 5 open. e lectr ic al c c hara terist ics t a = 25 c, (note 3) 5v C + lt1189m/c symbol parameter conditions min typ max units i s/d shutdown pin current pin 5 at v C 525 m a t on turn on time pin 5 from v C to ground, r l = 1k 500 ns t off turn off time pin 5 from ground to v C , r l = 1k 600 ns lt1189m/c symbol parameter conditions min typ max units v os input offset voltage either input, (note 4) 1.0 3.0 mv soic package 1.0 5.0 mv i os input offset current either input 0.2 1.0 m a i b input bias current either input 0.5 2.0 m a input voltage range 2.0 3.5 v cmrr common-mode rejection ratio v cm = 2.0v to 3.5v 80 100 db v out output voltage swing r l = 300 w to ground v out high 3.6 4.0 v (note 3) v out low 0.15 0.4 sr slew rate v o = 1.5v to 3.5v 175 v/ m s bw small-signal bandwidth a v = 10 30 mhz i s supply current 12 15 ma shutdown supply current pin 5 at v C 0.8 1.5 ma i s/d shutdown pin current pin 5 at v C 525 m a v s + = 5v, v s C = 0v, v ref = 2.5v, r fb1 = 900 w from pins 6 to 8, r fb2 = 100 w from pin 8 to v ref , r l = r fb1 + r fb2 = 1k, c l 10pf, pin 5 open. 5v C + e lectr ic al c c hara terist ics C55 c t a 125 c, (note 3) t a = 25 c, (note 3) 5v e lectr ic al c c hara terist ics
lt1189 4 lt1189c symbol parameter conditions min typ max units v os input offset voltage either input 1.0 3.0 mv (note 4) soic package 1.0 6.0 mv d v os / d t input v os drift 5.0 m v/ c i os input offset current either input 0.2 1.5 m a i b input bias current either input 0.5 3.5 m a input voltage range C2.5 3.5 v cmrr common-mode rejection ratio v cm = C 2.5v to 3.5v 80 105 db psrr power supply rejection ratio v s = 2.375v to 8v 70 90 db v out output voltage swing v s = 5v, r l = 1k, a v = 50 3.7 4.0 v v s = 8v, r l = 1k, a v = 50 6.6 7.0 v s = 8v, r l = 300 w , a v = 50, (note 3) 6.4 6.6 g e gain error v o = 1v, a v = 10, r l = 1k 1.0 3.5 % i s supply current 13 17 ma shutdown supply current pin 5 at v C , (note 11) 0.8 1.5 ma i s/d shutdown pin current pin 5 at v C 525 m a v s = 5v, v ref = 0v, r fb1 = 900 w from pins 6 to 8, r fb2 = 100 w from pin 8 to ground, r l = r fb1 + r fb2 = 1k, c l 10pf, pin 5 open. note 1 : a heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted continuously. note 2 : t j is calculated from the ambient temperature t a and power dissipation p d according to the following formulas: lt1189mj8, lt1189cj8: t j = t a + (p d 100 c/w) lt1189cn8: t j = t a + (p d 100 c/w) lt1189cs8: t j = t a + (p d 150 c/w) note 3 : when r l = 1k is specified, the load resistor is r fb1 + r fb2 , but when r l = 300 w is specified, then an additional 430 w is added to the output such that (r fb1 + r fb2 ) in parallel with 430 w is r l = 300 w . note 4 : v os measured at the output (pin 6) is the contribution from both input pair, and is input referred. note 5 : v in lim is the maximum voltage between Cv in and +v in (pin 2 and pin 3) for which the output can respond. note 6 : slew rate is measured between 1v on the output, with a v in step of 0.5v, a v = 10 and r l = 1k. note 7 : full power bandwidth is calculated from the slew rate measurement: fpbw = sr/2 p vp. note 8 : settling time measurement techniques are shown in take the guesswork out of settling time measurements, edn, september 19, 1985. note 9 : ntsc (3.58mhz). note 10 : ac parameters are 100% tested on the ceramic and plastic dip packaged parts (j8 and n8 suffix) and are sample tested on every lot of the so packaged parts (s8 suffix). note 11 : see application section for shutdown at elevated temperatures. do not operate shutdown above t j > 125 c. 5v C + e lectr ic al c c hara terist ics 0 c t a 70 c, (note 3) lt1189c symbol parameter conditions min typ max units v os input offset voltage, (note 4) either input 1.0 3.0 mv d v os / d t input v os drift 5.0 m v/ c i os input offset current either input 0.2 1.5 m a i b input bias current either input 0.5 3.5 m a input voltage range 2.0 3.5 v cmrr common-mode rejection ratio v cm = 2.0v to 3.5v 80 100 db v out output voltage swing r l = 300 w to ground v out high 3.5 4.0 v (note 3) v out low 0.15 0.4 i s supply current 12 16 ma shutdown supply current pin 5 at v, (note 11) 0.8 1.5 ma i s/d shutdown pin current pin 5 at v C 525 m a 5v v s + = +5v, v s C = 0v, v ref = 2.5v, r fb1 = 900 w from pins 6 to 8, r fb2 = 100 w from pin 8 to v ref , r l = r fb1 + r fb2 = 1k, c l 10pf, pin 5 open. 0 c t a 70 c, (note 3) e lectr ic al c c hara terist ics
5 lt1189 cc hara terist ics uw a t y p i ca lper f o r c e input bias current vs common-mode voltage vs common-mode voltage input bias current vs temperature temperature common-mode voltage (v) ? 0.5 input bias current ( a) 0 0.5 1.5 2.5 ? 0 2 4 lt1189 ?tpc01 m ? 2 1 3 125? 55? 25? v s = ?v ? 5 1.0 2.0 3.0 temperature (?) ?0 400 input bias current (na) 300 200 100 0 100 0 25 75 125 lt1189 ?tpc02 ?5 50 100 +i b ? b i os v s = 5v equivalent input noise voltage vs equivalent input noise current vs frequency frequency supply current vs supply voltage frequency (hz) equivalent input noise voltage (nv/ hz) 120 160 10 1k 10k 100k lt1189 ?tpc04 0 100 80 ? v = 5v t = 25? r = 0 s a s w 40 200 60 140 100 180 20 frequency (hz) 2 equivalent input noise current (pa/ hz) 12 10 1k 10k 100k lt1189 ?tpc05 0 100 6 ? 4 8 10 v s = 5v t a = 25? r s = 100k ?upply voltage (v) 0 8 supply current (ma) 12 14 16 246 10 lt1189 ?tpc06 8 55? 25? 125? 10 shutdown supply current vs temperature gain error vs temperature open-loop gain vs temperature temperature (?) ?0 0 shutdown supply current (ma) 2.0 3.0 4.0 5.0 6.0 0 25 75 125 lt1189 ?tpc07 1.0 ?5 50 100 v = ?v s v s/d = ? ee + 0.6v v s/d = ? ee + 0.4v v s/d = ? ee v s/d = ? ee + 0.2v temperature (?) gain error (%) lt1189 ?tpc08 ?0 ?.4 ?.6 ?.2 0 50 100 125 ?.0 ?5 25 75 ?.4 ?.8 ?.2 v s = 5v v out = ?v a v = 10 r l = 1k 0 open-loop gain (kv/v) 4 8 12 16 temperature (?) 50 0 50 100 125 lt1189 ?tpc09 ?5 25 75 r l = 1k r l = 500 w v s = 5v v o = 3v 14 10 6 2 temperature (?) common-mode range (v) 2.0 v + 50 25 75 125 lt1189 ?tpc03 v 0 1.0 ?.0 ?.0 0.5 ?.5 1.5 0.5 ?5 50 100 v + = 1.8v to 9v v + = ?.8v to 9v
lt1189 6 cc hara terist ics uw a t y p i ca lper f o r c e frequency (hz) 0 voltage gain (db) 20 60 80 100 100k lt1189 ?tpc11 ?0 1m 10m 100m 40 0 phase margin (deg) 20 60 80 100 ?0 40 gain phase v s = 5v t a = 25? r l = 1k gain bandwidth product and common-mode rejection ratio phase margin vs temperature output impedance vs frequency vs frequency temperature (?) ?0 100 gain bandwidth product (mhz) 200 250 0 50 100 125 lt1189 ?tpc13 150 ?5 25 75 phase margin (deg) 55 75 85 65 v = 5v r = 1k a v = 20db s l gain bandwidth product phase margin frequency (hz) common-mode rejection ratio (db) 50 60 70 80 100k 10m 100m lt1189 ?tpc15 30 1m 40 90 v s = 5v t a = 25? r l = 1k supply voltage (v) 0 100 gain bandwidth product (mhz) 150 200 250 24 810 lt1189 ?tpc12 6 t a = 25? t a = 125? t a = 55? a v = 20db open-loop voltage gain vs gain bandwidth product vs gain, phase vs frequency load resistance supply voltage frequency (hz) 0.1 output impedance ( ) 1 10 100 1k lt1189 ?tpc14 10k 100k 1m 10m 100m w v s = 5v t a = 25? a v = 10 power supply rejection ratio vs output short circuit current vs frequency temperature output swing vs supply voltage frequency (hz) 0 power supply rejection ratio (db) 20 40 60 80 1k 100k 10m 100m lt1189 ?tpc16 ?0 10k 1m +psrr psrr v s = 5v t a = 25? v ripple = 300mv temperature (?) ?0 30 output short circuit current (ma) 34 36 0 25 75 125 lt1189 ?tpc17 ?5 50 100 v s = 5v 32 31 33 35 supply voltage (v) output saturation voltage (v) v + lt1189 ?tpc18 v 0.3 0.8 0.7 0.2 0246 10 8 0.9 ?.0 0.4 0.5 0.1 ?.1 55? 125? 25? 55? 125? 25? r l = 1k ?.8v v s ?v load resistance ( w ) 100 0 open-loop voltage gain (kv/v) 10 20 30 1k 10k lt1189?tpc10 v s = 5v v o = 3v t a = 25?
7 lt1189 cc hara terist ics uw a t y p i ca lper f o r c e settling time (ns) 100 ? output voltage step (v) ? 2 4 140 340 lt1189 ?tpc21 180 220 260 300 v s = 5v t a = 25? r l = 1k 0 10mv 10mv harmonic distortion vs output level output voltage swing vs load resistance output voltage step vs settling time, a v = 10 slew rate vs temperature temperature (?) slew rate (v/ s) lt1189 ?tpc20 m ?0 200 250 300 ?5 0 50 75 25 100 125 v s = 5v r l = 1k v o = 2v a v = 10 slew rate +slew rate output voltage (v p-p ) 0 distortion (dbc) 12 3 4 lt1189 ?tpc22 0 10 20 30 40 50 ?0 v s = ?v t a = 25? r l = 1k f = 10mhz a v = 10 hd 3 hd 2 large-signal transient reponse a v = 10, r l = 1k, +sr = 223v/ m s, Csr = 232v/ m s lt1189 ? tpc23 load resistance ( w ) 10 ? output voltage swing (v) ? 1 5 100 1000 lt1189 ?tpc19 v s = 5v 3 ? t a = 55? t a = 25? t a = 25? t a = 55? t a = 25? t a = 25? a v = 10, r l = 1k, t r = 9.40ns lt1189 ? tpc24 small-signal transient reponse
lt1189 8 the primary use of the lt1189 is in converting high speed differential signals to a single-ended output. the lt1189 video difference amplifier has two uncommitted high input impedance (+) and (C) inputs. the amplifier has another set of inputs which can be used for reference and feed- back. additionally, this set of inputs give gain adjust, and dc control to the differential amplifier. the voltage gain of the lt1189 is set like a conventional operational amplifier. feedback is applied to pin 8, and it is optimized for gains of 10 or greater. the amplifier can be operated single- ended by connecting either the (+) or (C) inputs to the +/ref (pin 1). the voltage gain is set by the resistors: (r fb + r g )/r g . like the single-ended case, the differential voltage gain is set by the external resistors: (r fb + r g )/r g . the maximum input differential signal for which the output will respond is approximately 170mv. power supply bypassing the lt1189 is quite tolerant of power supply bypassing. in some applications a 0.1 m f ceramic disc capacitor placed 1/2 inch from the amplifier is all that is required. in applications requiring good settling time, it is important to use multiple bypass capacitors. a 0.1 m f ceramic disc in parallel with a 4.7 m f tantalum is recommended. calculating the output offset voltage both input stages contribute to the output offset voltage at pin 6. the feedback correction forces balance in the input stages by introducing an input v os at pin 8. the complete expression for the output offset voltage is: v out = (v os + i os (r s ) + i b (r ref )) (r fb + r g )/r g + i b (r fb ) r s represents the input source resistance, typically 75 w , and r ref represents finite source impedance from the dc reference voltage, for v ref grounded, r ref = 0 w the i os is normally a small contributor and the expression simplifies to: v out = v os (r fb + r g )/r g + i b (r fb ) if r fb is limited to 1k, the last term of the equation contributes only 2mv since i b is less than 2 m a. figure 1. simplified input stage schematic u s a o pp l ic at i wu u i for atio v + 7 6 lt1189 v 4 1 8 out v + 3 2 in v s/d 5 a v = + r fb + r fb 7 6 lt1189 4 1 8 out v + 3 2 in diff v s/d 5 r fb lt1189 ?ai01 7 6 lt1189 4 +/ref 1 ?fb 8 out v + 3 2 s/d 5 v o = r fb + r fb 7 6 lt1189 4 1 8 out v + 3 2 in v s/d 5 a v = r fb + r fb in v in v ( ( v in diff r fb ( ( v in +/ref ?fb +/ref ?fb +/ref ?fb r g r g r g v o = (v r fb + in diff + v in ) r g r g r g in diff v r g r g r g r g r g r g r g v + v v + v v + v lt1189 ?ai02 + 1 ref r ref r g 8 r fb 6 350 m a q3 q4 + 3 r s 345 m a q1 q2 2 r s 7v + r e 300 r e 300 4v
9 lt1189 instrumentation amplifier rejects high voltage instrumentation amplifiers are often used to process slowly varying outputs from transducers. with the lt1189 it is easy to make an instrumentation amplifier that can respond to rapidly varying signals. attenuation resistors in front of the lt1189 allow very large common-mode signals to be rejected while maintaining good frequency response. the input common-mode and differential-mode signals are reduced by 100:1, while the closed-loop gain is set to be 100, thereby maintaining unity-gain input to output. the unique topology allows for frequency re- sponse boost by adding 150pf to pin 8 as shown. u s a o pp l ic at i wu u i for atio 3.5mhz instrumentation amplifier rejects 120v p-p lt1189 ?ai03 + 100* 100* v cm 120v p-p v in 10k* 10k* 100 w 150pf ref fb 4 7 5v ?v lt1189 6 2 1 3 8 * 0.1% resistors worst case cmrr = 48db 10k output of instrumentation amplifier with 1mhz square wave riding on 120v p-p at the input lt1189 ? ai04 high voltage instrumentation amplifier response operating with low closed-loop gain the lt1189 has been optimized for closed-loop gains of 10 or greater. the amplifier can be operated at much lower closed-loop gains with the aid of a capacitor c fb across the feedback resistor, (feedback zero). this capacitor lowers the closed-loop 3db bandwidth. the bandwidth cannot be made arbitrarily low because c fb is a short at high frequency and the amplifier will appear configured unity-gain. as an approximate guideline, make bw a vcl = 200mhz. this expression expands to: a rc mhz vcl fb fb 2 200 p ()() = or: c a mhz r fb vcl fb = ()()() 200 2 p the effect of the feedback zero on the transient and frequency response is shown for a v = 4. frequency (hz) voltage gain (db) 20 lt1189 ?ai05 100m 10m 1m 100k 0 ?0 ?0 ?0 common-mode response differential-mode response
lt1189 10 u s a o pp l ic at i wu u i for atio small-signal transient response closed-loop voltage gain vs frequency a v = 4, r fb = 910 w , r g = 300 w lt1189 ? ai07 a v = 4, r fb = 910 w , r g = 300 w , cfb = 5pf lt1189 ? ai08 small-signal transient response reducing the closed-loop bandwidth although it is possible to reduce the closed-loop band- width by using a feedback zero, instability can occur if the bandwidth is made too low. an alternate technique is to do differential filtering at the input of the amplifier. this technique filters the differential input signal, and the differential noise, but does not filter common-mode noise. common-mode noise is rejected by the lt1189s cmrr. 10mhz bandwidth limited amplifier using the shutdown feature the lt1189 has a unique feature that allows the amplifier to be shutdown for conserving power, or for multiplexing several amplifiers onto a common cable. the amplifier will shutdown by taking pin 5 to v C . in shutdown, the amplifier dissipates 15mw while maintaining a true high impedance output state of about 20k w in parallel with the feedback resistors. for mux applications, the amplifiers may be configured inverting, non-inverting, or differential. when the output is loaded with as little as 1k w from the amplifiers feedback resistors, the amplifier shuts off in 600ns. this shutoff can be under the control of hc cmos operating between 0v and C 5v. frequency (hz) closed-loop voltage gain (db) 30 lt1189 ?ai06 100m 10m 1m 100k 20 10 ?0 ?0 0 v s = 5v t a = 25? a v = 4 r fb = 900 w r g = 300 w c fb = 5pf c fb = 0pf lt1189 ?ai09 5v 7 6 lt1189 ?v 4 + ref 3 1 fb 2 8 v out 909 w r1 110 w r2 110 w c1 68pf a v = 10 f ?db = 2 p (r1 + r2)c1 1 v out = filter sig + en d + cmr en cm en d sig en cm 100 w
11 lt1189 u s a o pp l ic at i wu u i for atio the ability to maintain shutoff is shown on the curve shut down supply current vs temperature in the typical per- formance characteristics section. at very high elevated temperature it is important to hold the shutdown pin close to the negative supply to keep the supply current from increasing. shutdown v out a v = 10, r fb = 900 w , r g = 100 w lt1189 ? ai10 1mhz sine wave gated off with shutdown pin u a o pp l ic at i ty p i ca l differential receiver mux for power down applications lt1189 ?ta03 ref fb + v dc v out 5v ?v cable 1 cable 2 15k cmos in channel select 100 w 1k 1.5k 1.5k lt1189 15k ref fb + v dc 1k 5v ?v 15k 100 w 1.5k 1.5k lt1189 15k 1k 1k ?v 2 6 7 5 4 8 1 3 2 6 7 5 4 8 1 3 74hc04 74hc04 1% resistors worst case cmrr = 28db typically 35db information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
lt1189 12 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7487 (408) 432-1900 l fax : (408) 434-0507 l telex : 499-3977 ? linear technology corporation 1993 u package d e sc r i pti o dimensions in inches (millimeters) unless otherwise noted. w i spl ii f ed s w a ch e ti c + out v bias v lt1189 ?ss bias v m c ff c +v +v 3 2 5 1 +/ref s/d 6 * v 7 + v 4 * substrate diode, do not forward bias 8 ?fb ba/lt/gp 0293 10k rev 0 0.045 ?0.015 (1.143 ?0.381) 0.100 ?0.010 (2.540 ?0.254) 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.130 ?0.005 (3.302 ?0.127) 0.020 (0.508) min 0.018 ?0.003 (0.457 ?0.076) 0.125 (3.175) min 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.320 (7.620 ?8.128) 0.325 +0.025 0.015 +0.635 0.381 8.255 () 12 3 4 87 6 5 0.250 ?0.010 (6.350 ?0.254) 0.400 (10.160) max 1 2 3 4 0.150 ?0.157 (3.810 ?3.988) 8 7 6 5 0.189 ?0.197 (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) 0.010 ?0.020 (0.254 ?0.508) 0.016 ?0.050 0.406 ?1.270 45 0 8?typ 0.008 ?0.010 (0.203 ?0.254) 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc 0.290 ?0.320 (7.366 ?8.128) 0.008 ?0.018 (0.203 ?0.460) 0??15 0.385 ?0.025 (9.779 ?0.635) 0.005 (0.127) min 0.405 (10.287) max 0.220 ?0.310 (5.588 ?7.874) 12 3 4 87 65 0.025 (0.635) rad typ 0.045 ?0.065 (1.14 ?1.65) full lead option 0.023 ?0.045 (0.58 ?1.14) half lead option corner leads option (4 plcs) 0.014 ?0.026 (0.360 ?0.660) 0.200 (5.080) max 0.015 ?0.060 (0.381 ?1.524) 0.125 3.175 min 0.100 ?0.010 (2.540 ?0.254) 0.045 ?0.065 (1.14 ?1.65) j8 package 8-lead hermetic dip n8 package 8-lead plastic dip s8 package 8-lead plastic soic

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